RenumKiCadPCB v0.400 Released!

I have entirely re-written RenumKiCadPCB into c++ and made it into a GUI (Windows-like) program. All the source files as well as build instructions and a Windows 10 installation file (RenumKiCadPCB.msi) can be found at https://github.com/BrianAtDocumentedDesigns/RenumKiCadPCB0400

I also added a few features and fixed a number of bugs.

As usual, please contact brian@documenteddesigns.com with bug reports or feature requests.

 

 

RenumKiCadPCB V0.352 on Github

I just uploaded V0.352 to Github. This (hopefully) fixed a bug where the system could chose the wrong “Top Layer”. It also (hopefully) corrected an issue with the undocumented AR field in the schematic. The field is not only undocumented, as implemented it can lead to “ghost” components in the file which are not visible to eeSchema or PCBNew. This, in turn led to errors in renumbering which could previously only be corrected by manually editing the schematic file with a text editor.

Although I have tested the code on my system I have not received feedback with respect to whether it works (or builds) for others.

I am re-writing RenumKiCadPCB from scratch in c++. I am doing so in order to learn c++ and wxWidgets and then create a GUI version of the program. Doing so may provide enough of a grounder to produce a version of eeSchema and/or PCBNew with integral renumbering. It should be quite easy to do this once I get the hang of a few parts of the KiCad source. The developers would like to see renumbering “pushed” from PCB to schematic via a netlist update. This probably makes sense in the broader context of things like pin swapping but since no progress has been mode in this direction it will have to work.

I intend to add a number of features to V0.400 (which I might release before V0.500, the GUI version). These are:

  1. Enable global change to module text angle;
  2. Enable global change to module text location (i.e. align Value and/or User with Ref, center the text fields on the module;
  3. Generate a Was/Is file from the PCB;
  4. Update schematic only using a Was/Is file.

The last two items may seem odd but it looks like updating the schematic only and then using eeSchema to update the PCB using timestamps regenerates the PCB and the netlist directly using KiCad internal functions so this would be a stepping stone to full integration, or at least less likelihood of RenumKiCadPCB getting out of sync with the file formats which appear to evolve and not be well documented. The net result of was/is generation followed by update PCB is substantially identical to pushing a netlist from PCB to schematic.

I would greatly appreciate any feature suggestions, bug reports, or general encouragement.

 

RenumKicadPCB Project moved to Github

When I started having trouble with WordPress and zip files I moved the repository for RenumKicadPCB to DropBox. I recently was alerted that for some I had to give a user “permission” to access the link even though it was supposed to be shared. I have no problem with this but I understand some users might so I decided to move the project to Github. Here is the link https://github.com/BrianAtDocumentedDesigns/RenumKicadPCB

 

RenumKicadPCB V0.351

I completed a rewrite a couple months but didn’t do all the testing I wish I had.

I’ve found no problems with this code but admit I have been focusing on Kicad proper with the hope the developers will add renumbering to V6.

Let me know if there are issues.

For some reason WordPress is blocking me from using zip files. Here is a link to the file on Dropbox

https://www.dropbox.com/s/jekf97odywc5bdx/RenumKiCadPCBV0351.zip?dl=0

Direct link (no log in) View file

 

 

Eeek! Issues with RenumKiCadPCBV0300 Zip

Thanks to Michael I learned that there are issues with at least the two most recent exe files zip files I posted.

Somehow I was distributing without a dll which can be corrected by compiling like this under msys2

gcc RenumKiCadPCB.c -static-libgcc -static-libstdc++ then renamining a.exe to renum.exe (or whatever).

Here is the corrected file RenumKiCadPCBV0300-fixed

Sorry about the screw up. I had been trying to compile Kicad sources and must have modifile my compiler settings or something.

There appears to be a bug I thought I had fixed, namely that a windows file path with a “.” (i.e. ver1.c.pro) gets trimmed wrongly. I will update soon.

 

RenumKiCadPCB V0.300

V0.300 RenumKiCadPCBV0300-fixed  (NOTE: THIS IS AN UPDATED ZIP WITH A FIXED EXE FILE) is a substantial rewrite in order to process errors better and to fix bugs which popped up in stress testing.

User Jano reported “The make RenumKiCadPCB don’t works out of the box, instead I was able to compile with: gcc RenumKiCadPCB.c -o RenumKiCadPCB -lm”

I don’t know if this is an issue across Linux versions but, just in case I have updated the manual in the zip.

Now everything is done in memory before writing to files.  If there are warnings, it asks whether to commit changes. After all, some errors, like mounting holes on the PCB which are not on the schematic, are not critical, even though you really should fix errors (including ERC and DRC).

If there are no errors (or if the user decides to “commit”), all related files are backed up and the new ones are written.

I fixed a number of issues associated with/exposed by weird file content in TERES_PCB1-A64-MAIN_Rev.C.pro.

I have stress tested with https://github.com/OLIMEX/DIY-LAPTOP/tree/master/HARDWARE/A64-TERES/TERES-PCB1-A64-MAIN_Rev_C which is the most complex KiCad project I have come across.

The Olimex Rev C files themselves have issues:

ERC and DRC show errors. I was able to fix all the ERC errors:
1) Resistor networks in the schematic have sections with different modules than                     the PCB
2) There is an excess PWR_FLAG on a power connector.

Also (bug reported to the developers) LCD.SCH has a “phantom” instantiation which does  not show up in ERC. The phantom instantiation meant parts were labeled U? but didn’t show up as not annotated. Even though renumKiCadPCB works, it flags errors such as this.

There are blank reference designations (i.e. “”) on the PCB.

The good news is, all these errors exposed issues with RenumKiCadPCB!

The Olimex PCB fails DRC with 9 errors as distributed. After creation and importation of a netlist this becomes 27 errors. The new errors appear to be associated with zones, a well established KiCad bug (see MANUAL.TXT).

I couldn’t figure out Olimex’s license, otherwise I’d post the fixed files (renumbered!)

After RenumKiCadPCB is run on the original files or the fixed files the DRC errors are the same, respectively. I assume, therefore, that RenumKiCadPCB is working. (famous last words …)

The Kicad “pour error” described in MANUAL.TXT still seems to be present in Kicad V5 nightly builds. The way you fix it (in V5 nightlies) is to “Edit” the zone (which I find a pain in the butt to do – type “E” exactly on the edge zone outline).

Make sure Net Filtering Display: Show All is selected and rename the zone net.

I remain hopeful the developers will decide to incorporate RenuKiCadPCB functionality into the software. It should be easy to do (but I don’t know how). Again, if there is anybody out there willing to do encourage the KiCad development group, please do.

Similarly, I would welcome anybody with requisit c++ or GUI programming skills to put a wrapper on the code.

PLEASE LET ME KNOW OF ANY BUGS!

RenumKiCadPCB V0.205 Bug Fix

I was hoping to produce a version of RenumKiCadPCB in a few days but moved things up after I got a bug report (plus fixed code!) from Sean Happel. Long story short a function I wrote to scan for component fields like F0, F1, and so on, didn’t care if the field started on a new line.

V0.205 fixes this bug with Sean’s code and now updates the netlist file. Previously RenumKiCadPCB updated the board and schematics but left the netlist alone since I figured it was trivial to regenerate the netlist. Admittedly this was pretty stupid of me as I often forgot to update the netlist before importing it.

Here is the source, manual, and Windows executable for V0.205: RenumKiCadPCBV0.205

So, now all the relevant files are updated with the proper reference designations.

There may be other bugs in the code: stress testing on Olimex Diylaptop project fails. order to debug a large project like that I have decided to make some relatively significant changes to the code so the updated files will not be committed if there are errors unless directed by the user. In other words, if there are errors in the input files, the user will be asked to commit the changes or abort updating the files.

I hope to release V0.206 once I have fixed that *and* figured out why Diylaptop fails. Of course, if other bugs are reported I’ll fix those first.

The Kicad “pour error” still seems to be present in Kicad V5 nightly builds, however I don’t know how to fix the error in V5.

Also, it seems to me the best time to run RenumKiCadPCB is prior to routing the board rather than just before making the Gerbers, which is what I have been doing. That way any missing component issues will beresolved early. No sense routing a board if the schematic and PCB have different parts!

I have suggested to the folks at KiCad to assign someone to incorporate RenumKiCadPCB into the code base. This should be easy enough to do but I lack c++ and GUI skills so I can’t do it alone. If there is anybody out there willing to do encourage the KiCad development group, please do.

Similarly, I would welcome anybody with c++ or GUI programming skills to put a wrapper on the code. A GUI would likely widen its appeal.

Thanks for using the code, and thanks for the bug reports!